The System Bus | ACCA4021

Overview

The system bus is the set of wires that connects the CPU to main memory and to input and output devices. This worksheet looks at its three parts, the address bus, the data bus and the control bus, down to the level of individual wires. You will watch a memory read and a memory write happen one wire at a time, and work out how the width of each bus limits how much memory a computer can use and how fast it can move data. Work through the tasks in order and try each question before checking.

Learning Objectives

By the end of this lab you will be able to:

Describe the purpose of the address bus, data bus and control bus
State which buses carry signals one way and which carry them both ways
Describe the steps of a memory read and a memory write
Calculate the number of addressable memory locations from the width of the address bus
Explain how the width of the data bus affects performance

Concept

A bus is a group of parallel wires. Each wire carries one bit at a time, either a 1 (a high voltage) or a 0 (a low voltage). A bus with 8 wires can therefore carry 8 bits at once. The system bus is split into three buses, each with its own job.

The address bus carries an address from the CPU to memory. It says which location the CPU wants.
The data bus carries the value being moved. It says what is being read or written.
The control bus is a set of separate signal wires, such as memory read, memory write and the clock. They say what should happen and when.

Tasks

Task 1 - The three buses

Bus	Carries	Direction
Address bus	The address of a memory location (or I/O device)	One way: CPU to memory. Memory never needs to send an address back.
Data bus	The value being read or written	Both ways: memory to CPU for a read, CPU to memory for a write
Control bus	Signals such as memory read, memory write, clock, reset and interrupt requests	Both ways overall. Most signals come from the CPU, but some, such as an interrupt request from a device, go to it.

Which bus carries values in both directions between the CPU and memory?

A. The address bus B. The data bus C. Neither D. Both

Data goes from memory to the CPU when reading and from the CPU to memory when writing. Addresses only ever go from the CPU.

The CPU wants memory to store a value. Which signal tells memory to store rather than send?

A. An address on the address bus B. A memory write signal on the control bus C. A 1 on every data wire D. The clock

The control bus carries the memory read and memory write signals that tell memory which way the transfer goes.

Task 2 - A memory read and write, wire by wire

In this diagram each bus is drawn as its real set of wires. A grey wire is not in use, a navy wire is carrying a 0 and a gold wire is carrying a 1. The small white dots show which way the signals are travelling. First press Go to read address 6. Then click a different memory row and read it. Next, choose Write to memory, enter a value, pick an address and press Go. Compare the order of the steps and the direction of the data wires in a read and a write.

To read address 6, the address wires A3 to A0 carry .

In a read, the control unit switches on the wire.

Address 6 holds 0010 1010. During the read, of the 8 data wires carry a 1.

In a read, data travels from to the . In a write, it travels the other way.

Describe, in order, the three steps of a memory write. Say which bus is used at each step.

First, the CPU puts the address from the MAR onto the address bus, and memory selects that location. Second, the CPU puts the value from the MDR onto the data bus. Third, the control unit switches on the memory write signal on the control bus, and memory stores the value from the data bus at the selected address.

Task 3 - How wide is the address bus?

Each wire on the address bus is a 0 or a 1. With one wire there are 2 possible addresses. With two wires there are 4: 00, 01, 10 and 11. Every extra wire doubles the number of patterns. Use the slider to change the number of address wires, and click the wires or the memory locations to select different addresses.

\text{addressable locations} = 2^{n} \qquad \text{for an } n\text{-bit address bus}

Real address buses are much wider than 8 bits. If each location holds one byte, the number of locations is also the number of bytes of memory the CPU can use.

Address bus width	Locations (2ⁿ)	With one byte per location
8 bits	256	256 bytes
16 bits	65,536	64 KiB
20 bits	1,048,576	1 MiB
32 bits	4,294,967,296	4 GiB

A 10-bit address bus can address 2¹⁰ = locations.

A 12-bit address bus can address locations.

To address 256 locations, the address bus needs wires.

Adding one wire to the address bus the number of locations that can be addressed.

Older PCs with a 32-bit address bus could not use more than 4 GiB of memory, even if more was installed. Explain why.

A 32-bit address bus has 2 to the power 32 = 4,294,967,296 different addresses. With one byte at each address that is 4 GiB. Any memory beyond that has no address the CPU can put on the bus, so it can never be read or written.

Task 4 - How wide is the data bus?

The width of the data bus decides how many bits move in each transfer. In the diagram below, eight bytes have to move from memory to the CPU, and each clock tick carries one transfer. Choose a bus width and predict the number of ticks before pressing Transfer.

With an 8-bit data bus, moving 8 bytes takes ticks.

With a 32-bit data bus, moving 8 bytes takes ticks.

A 64-bit data bus carries bytes in each transfer.

Doubling the width of the data bus makes the computer faster, but doubling the width of the address bus does not. Explain the difference.

A wider data bus moves more bits in every transfer, so fewer transfers are needed to move the same data and the CPU waits less. A wider address bus only increases how many memory locations can be reached. It does not move data any faster.