The Half Adder | ACCA4021

Overview

A processor adds numbers using nothing but logic gates. This worksheet shows how. You will look closely at what happens when two single bits are added, spot which gates produce exactly the right outputs, and join them into a half adder, a circuit that adds two bits. It builds on the Binary Numbers and Logic Gates worksheets, and the first task recaps what you need from each. Work through the tasks in order. Most tasks have an interactive diagram or self-checking questions, so try each question yourself before checking.

Learning Objectives

By the end of this lab you will be able to:

Describe the result of adding two single bits as a sum bit and a carry bit
Identify the gates whose outputs match the sum and carry of single-bit addition
Build a half adder from an XOR gate and an AND gate and explain what each output represents
Explain why a half adder on its own cannot add multi-bit numbers

Concept

Adding two single bits can produce 0, 1 or 2. The first two fit in one bit, but 2 is 10 in binary and needs two. So the result of adding two bits is always written as a pair of bits, a sum bit for the current column and a carry bit for the next column to the left. Each of those output bits depends only on the two input bits, so each one can be described by a truth table with four rows. If the truth table for the sum or the carry matches the truth table of a logic gate, that gate can produce that output directly. Finding those matches turns an arithmetic problem into a circuit. A half adder is the circuit that results. It has two inputs, A and B, and two outputs, S for the sum and C for the carry. In a circuit diagram, a wire can split at a junction so that the same input reaches more than one gate, which is how both outputs are worked out from the same pair of inputs at the same time.

Tasks

Task 1 - Recap: gate truth tables and binary addition

This worksheet uses two things you have already met. The first is the truth tables for the two-input gates from the Logic Gates worksheet, shown together below. Each gate column gives the output Q for the inputs in that row.

A	B	AND	OR	NAND	NOR	XOR
0	0	0	0	1	1	0
0	1	0	1	1	0	1
1	0	0	1	1	0	1
1	1	1	1	0	0	0

The second is the four rules for adding single bits from the Binary Numbers worksheet.

\begin{array}{rcl} 0 + 0 &=& 0 \\ 0 + 1 &=& 1 \\ 1 + 0 &=& 1 \\ 1 + 1 &=& 10_2 \quad \text{(write 0, carry 1)} \end{array}

Which gate outputs 1 only when its two inputs are different?

A. AND B. OR C. NOR D. XOR

XOR (exclusive OR) outputs 1 for the rows 0, 1 and 1, 0, where exactly one input is 1.

What is 1 + 1 in binary?

A. 1 B. 2 C. 10 D. 11

One plus one is two, and two in binary is 10. The digit 2 does not exist in binary.

Task 2 - Spot the gates inside single-bit addition

Look at what happens when you add just two single bits, A and B. The answer can be 0, 1 or 2, so it needs two bits to write down. The right-hand bit is the sum (S) and the left-hand bit is the carry (C).

A	B	A + B	C	S
0	0	0	0	0
0	1	1	0	1
1	0	1	0	1
1	1	2	1	0

Now compare the C column and the S column with the gate columns in the recap table in Task 1.

The carry column C matches the output of the gate.

The sum column S matches the output of the gate.

Why is an OR gate the wrong choice for the sum bit, even though it gives the right answer in three of the four rows?

For A = 1 and B = 1, OR outputs 1, but the sum bit should be 0 because 1 + 1 = 10 in binary. The 1 belongs in the carry, not the sum. XOR gives 0 in that row, so it matches the sum bit in every case.

Task 3 - Build the half adder

You have just found that adding two bits needs exactly two gates. Feed both inputs into an XOR gate to get the sum, and feed the same two inputs into an AND gate to get the carry. This circuit is called a half adder.

S = A \oplus B \qquad\qquad C = A \cdot B

In the circuit below, each input wire splits at the dot so that it reaches both gates. Click A and B to try all four combinations. For each one, read the C and S lamps as a 2-bit binary number and check that it equals A + B.

A = 0, B = 1 gives S = and C =

A = 1, B = 1 gives S = and C =

In a half adder the sum comes from the gate and the carry comes from the gate.

Task 5 - The limits of a half adder

Here is a 4-bit addition, 0101 + 0011 (5 + 3), worked column by column. The top row shows the carries.

  carry   1 1 1
          0 1 0 1
        + 0 0 1 1
        ---------
          1 0 0 0

Look at the second column from the right. To work out that column you had to add three bits, the two bits in the column and the 1 carried in from the column before.

A half adder has two inputs. Explain why a single half adder can only correctly handle the rightmost column of a multi-bit addition.

The rightmost column never receives a carry, so it only ever adds two bits, which is exactly what a half adder does. Every other column may need to add three bits, the two bits in that column plus a carry from the column to its right. A half adder has no input for that incoming carry, so on its own it cannot handle those columns.

In the worked example, how many bits did the second column from the right have to add, and what were they? What were its sum and carry?

It added three bits: 0 from 0101, 1 from 0011, and a carried 1 from the rightmost column. The total is 2, which is 10 in binary, so the sum bit is 0 and the carry bit is 1.