VHDL,Vivado and other relevant files used for this project.

- 16_bit_SAR contains all the VHDL and Vivado file.
	- Contain final version of the SAR ADC system in Vivado workspace file.
		- Run simulation, synthesism, implmentation, timing reports etc and they should match the final working ones in the report.
	-All VHDL scripts included as indpendent scipts as well (need to be opened with VSC or Notepad++).
		-Testbench scripts in the testbench folder.

- Proteus folder holds the S&H Proteus Simulation
	-Quick run (debug oscilliscope if it does not turn up upon start of sim).
	- Should match the reports S&H oscilliscope signal. 

- MatLab Sine wave generation of data for the VHDL "ROM_data" script in Matlab folder.