Overview
The control unit (CU) is the part of the CPU that runs the show. It reads each instruction, works out what it means, and switches on the right signals at the right moments so that registers, the ALU, the buses and memory all do their part. This worksheet looks inside it. You will decode instructions bit by bit, see how a decoder is built from the AND gates you already know, and follow the control signals the CU sends on every tick of the clock. Work through the tasks in order and try each question before checking.
Learning Objectives
By the end of this lab you will be able to:
- Describe the job of the control unit
- Split a machine code instruction into its opcode and operand
- Explain how a decoder turns an opcode into a single active line using AND gates
- Describe the control signals sent during the fetch and execute of an instruction
- Explain the role of the clock and calculate the time taken by an instruction
- Compare hardwired and microprogrammed control units
Concept
Every instruction in this worksheet is 8 bits long. The first 4 bits are the opcode, which says what to do. The last 4 bits are the operand, which in this instruction set is always a memory address.
| Opcode | Mnemonic | What it does |
|---|---|---|
0001 | LOAD n | Copy the value at address n into the ACC |
0010 | STORE n | Copy the value in the ACC into address n |
0011 | ADD n | Add the value at address n to the ACC |
0100 | SUB n | Subtract the value at address n from the ACC |
0101 | JMP n | Jump: carry on from address n |
0110 | JZ n | Jump to address n, but only if the Z flag is 1 |
0000 | HALT | Stop the program |
For example, 0011 0110 has opcode 0011 (ADD) and operand 0110 (6), so it means "add the value at address 6 to the accumulator".
The control unit does three things with each instruction. It fetches it from memory into the CIR, decodes the opcode to work out which instruction it is, and then sends the control signals that make the rest of the CPU execute it. Every step happens on a tick of the clock.
Tasks
Task 1 - What the control unit does
The control unit does not store data or do arithmetic itself. Its outputs are control signals: single wires that switch other parts of the CPU on or off. For example, a MAR_LOAD signal tells the MAR to copy in whatever value is on its input, and a MEM_READ signal on the control bus tells memory to send back the contents of an address.
Which of these is a job of the control unit?
Which register does the control unit decode instructions from?
Task 2 - Opcode and operand
The diagram shows the 8 bits of the CIR. The 4 opcode bits feed a 4-to-16 decoder, a circuit with 16 output lines of which exactly one is 1 at any time: the one numbered by the opcode. Each output line means one instruction. The operand bits go separately to wherever the address is needed.
Use the Try buttons, then click individual bits to build your own instructions. Try making an opcode that is not in the table.
0001 0101 is the instruction .
0010 1110 is the instruction .
0101 0000 is the instruction .
The instruction SUB 9 is written as in binary.
The instruction JZ 3 is written as in binary.
Task 3 - Inside the decoder
Look at the right-hand panel of the Task 2 diagram. Each output line of the decoder is a single AND gate with four inputs, one for each opcode bit. A small circle (a bubble) on an input inverts it, like a NOT gate. The bubbles are placed so that the gate outputs 1 for exactly one opcode.
For example, the ADD line (opcode 0011) needs b7 and b6 to be 0 and b5 and b4 to be 1.
The STORE line (opcode 0010) needs a bubble on of its 4 inputs.
The HALT line (opcode 0000) needs a bubble on of its 4 inputs.
LOAD = NOT b7 AND NOT b6 AND b5 AND b4.
Why can two decoder output lines never be 1 at the same time?
Task 4 - Control signals, tick by tick
The diagram below shows every control signal the CU can send down the left-hand side, and the clock ticks across the top. Each column is one tick, and a shaded cell means that signal is on during that tick. In this CPU, each register transfer takes one tick.
Pick an instruction and press Play the clock, or click a tick to jump to it. Notice that the first five ticks are the same for every instruction.
At T1 the signals and MAR_LOAD copy the PC into the MAR.
The fetch and decode stages take ticks for every instruction.
ADD takes ticks in total, and JMP takes .
The only instruction that switches on MEM_WRITE is .
Choose JZ and switch the Z flag between 0 and 1. What changes?
Why does no control signal leave the CU during the decode tick (T5)?
Task 5 - The clock
The clock is a signal that switches between 0 and 1 at a fixed rate. Each tick is the CU’s cue to start the next step. Clock speed is measured in hertz (ticks per second). A 3 GHz clock ticks 3,000,000,000 times a second.
Use the clock speed slider in Task 4 to check your answers below.
At 2 GHz, one tick takes ns.
At 2 GHz, an 8-tick ADD instruction takes ns.
At 4 GHz, the same ADD instruction takes ns.
At 2 GHz, a program made only of ADD instructions could run million of them each second.
Why does the CPU need a clock at all? What could go wrong if each part started its next step as soon as it was ready?
Task 6 - Hardwired and microprogrammed control
There are two ways to build the logic that turns a decoded instruction into its sequence of control signals.
| Hardwired | Microprogrammed | |
|---|---|---|
| How it works | The signals come from fixed logic gate circuits, like the decoder in Task 3 | Each instruction is a small program of microinstructions stored in a special memory inside the CU. Each microinstruction lists the signals for one tick, like a column of the Task 4 timeline. |
| Speed | Faster, because signals come straight from the gates | Slower, because microinstructions have to be read from control memory |
| Changing it | Hard. The circuit must be redesigned. | Easier. The microprogram can be rewritten, and sometimes updated after the CPU is made. |
| Suits | Small, simple instruction sets | Large instruction sets with complex instructions |
Many modern CPUs use both: simple instructions are hardwired for speed, and rare complex ones are run as microcode.
The Task 4 timeline could be stored in a table, with one row of on/off bits for each tick of each instruction. Which type of control unit would that table belong to, and why?
Task 7 - Check your understanding
In the instruction 0100 0111, what is the operand?
How many output lines of a decoder are 1 at any one time?
A CPU’s clock speed is doubled and nothing else changes. What happens to the time each instruction takes?